Conventional semiconductor devices typically comprise a semiconductor substrate, normally made of monocrystalline silicon, and a plurality of dielectric and conductive layers formed thereon. An integrated circuit is formed containing a plurality of conductive patterns comprising conductive lines separated by interwiring spacings, and a plurality of interconnect lines, such as bus lines, bit lines, word lines and logic interconnect lines. Such interconnection lines, made of metal interconnect materials, generally constitute a limiting factor in terms of various functional characteristics of the integrated circuit. As such, there exists a need to provide a reliable interconnection structure capable of achieving higher operating speeds, improved signal-to-noise ratio and improved reliability.
Aluminum and aluminum alloys are extensively used as metal interconnect materials. While aluminum-based materials are one of the materials of choice for use as metal interconnects, there are concerns as to whether aluminum can meet the demands required as circuit density and speeds for semiconductor devices increase. Because of these concerns, other materials are under consideration for use as metal interconnect materials in integrated circuits. Copper is one such material under consideration. Advantages associated with the use of copper as a metal interconnect material include lower susceptibility to electromigration failure (as compared to aluminum) and lower resistivity (also as compared to aluminum).
One of the problems associated with the use of copper as a metal interconnect material is that copper readily diffuses into surrounding dielectric materials, especially silicon dioxide. In order to inhibit copper diffusion into surrounding dielectric materials, barrier-type materials can be provided to surround copper interconnects. For example, a dielectric layer, such as silicon nitride, which is substantially impervious to the diffusion of copper atoms therethrough, may be provided on the upper surface of a copper interconnect. And a conductive barrier layer along the side walls and bottom surface of a copper interconnect may be provided. Tantalum may be used as a conductive barrier layer since it is substantially impervious to the diffusion of copper atoms.
However, there are problems associated with using a tantalum layer as a barrier layer along the side walls and bottom surface of a copper interconnect. One problem involves the removal of tantalum that is deposited on the semiconductor substrate but not surrounding (or partially surrounding) a copper interconnect (not deposited along the side walls and bottom surface of a copper interconnect). Conventionally, such tantalum is removed by chemical mechanical polishing (CMP) techniques. In instances where the semiconductor substrate has a waving surface or the polishing pad of the polisher has a waving surface, CMP may not remove all of the tantalum deposited in areas other than along the side walls and bottom surface of a copper interconnect. This phenomenon is termed bridging. Bridging is undesirable because it is characterized by randomly located conductive regions on the substrate. This degrades the electrical properties of the resultant electronic devices.
Another problem is that CMP techniques for removing tantalum poorly discriminate between tantalum and dielectric layers such silicon dioxide, and between tantalum and copper. This problem results in inadequate interconnect formation as well as poor electrical properties of the resultant electronic devices. It is therefore desirable to have the capability to selectively remove all or portions of a tantalum layer from a semiconductor substrate to the substantial exclusion of other materials.